Can Large Language Models (LLMs) revolutionize hardware design? Today, we explore a fascinating paper that investigates using LLMs, like Deepseek and OpenAI models, to automate high-level synthesis (HLS) optimization. HLS involves transforming high-level code, such as C++, into hardware blueprints, a complex task traditionally requiring human expertise and lots of trial and error. The study focuses on an “agentic” framework where the LLM actively modifies code, inserts pragmas, and gets feedback from HLS tools, using metrics like area, latency, and throughput to iteratively improve designs.
The researchers tested this framework on kernel-level and system-level optimization tasks, comparing LLMs with and without explicit reasoning capabilities. Surprisingly, reasoning models didn’t consistently outperform the baseline in terms of final hardware quality. While they showed higher success rates in producing functional designs, they often consumed more computational resources. Furthermore, all models struggled with formulating integer linear programming (ILP) problems, particularly with modeling latency in parallel hardware components.
The findings highlight the unique challenges of hardware design, such as understanding parallelism and accurately modeling performance, which current LLMs may not be fully equipped to handle. The researchers open-sourced their framework, paving the way for future research into specialized training data, hardware intuition modules, and hybrid AI approaches that combine the strengths of general LLMs with specialized hardware expertise.
Paper Title: Can Reasoning Models Reason about Hardware? An Agentic HLS Perspective
Authors: Luca Collini, Andrew Hennessee, Ramesh Karri, Siddharth Garg
Link: arxiv.org/pdf/2503.12721.pdf
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